The present disclosure relates to a memory control apparatus. More particularly, the disclosure relates to a memory control apparatus for a non-volatile memory, a memory apparatus, an information processing system; a processing method for use therewith, and a program for causing a computer to perform the method.
In information processing systems, the DRAM (Dynamic Random Access Memory) or the like is used as a work memory. The DRAM is usually a volatile memory of which the stored content is lost once the supply of power to the memory is removed. Meanwhile, non-volatile memories (NVM) have come to be used in recent years. The non-volatile memories are roughly classified into two categories: flash memories that support access of data in large-size units, and non-volatile random access memories (NVRAM: Non-Volatile RAM) supporting high-speed random access in small-size data units. A representative example of flash memory is the NAND flash memory. Examples of non-volatile random access memory are the ReRAM (Resistance RAM), PCRAM (Phase-Change RAM), and MRAM (Magnetoresistive RAM).
The ReRAM is a non-volatile memory that uses variable resistive elements. Before writing of data to the ReRAM, there is no need to delete data therefrom in blocks. The ReRAM allows only necessary pages to be directly rewritten, as opposed to the NAND flash memory or the like in which threshold values of the charge storage amount in floating gates are stored as data. A variable resistive element can record one-bit information represented by one of a high resistive state (HRS) and a low resistive state (LRS). In non-volatile memories such as the ReRAM, the data to be written to is pre-read for comparison with write data so that only the necessary bits may transition in state. Because the state transitions incur consumption currents, the number of transitioning bits should preferably be minimized. For that purpose, there has been proposed a semiconductor storage system which, if the number of the bits to be rewritten is a majority, inverts the bits of the write data in order to reduce the rewrite bit count (e.g., see Japanese Patent Laid-Open No. 2009-230796).